Circuit configuration comprising a control loop

ABSTRACT

The invention relates to a circuit arrangement with a regulating circuit which is particularly used for regulating a resonant converter having a plurality of outputs.  
     To provide a circuit arrangement comprising a regulating circuit for converters having a plurality of outputs, which arrangement comprises a protective circuit that can be constructed with the least possible circuitry and cost, which protective circuit reliably protects against cases of overload, it is proposed that the regulating circuit is used for generating a pulse-width modulated regulation signal ( 20 ) in dependence on measuring signals (Va, Vb) present on inputs of the regulating circuit ( 20 ), and including a comparator circuit ( 212 ) for comparing the duty cycle (δ) of the regulation signal ( 20 ) with a predefinable maximum duty cycle value (δmax) and minimum duty cycle value (δmin), in which in case of a duty cycle (δ) situated outside the range between the maximum duty cycle value (δmax) and the minimum duty cycle value (δmin) the circuit arrangement delivers control information that corresponds to this exceeding of the range.

[0001] The invention relates to a circuit arrangement with a regulatingcircuit which is particularly used for regulating a resonant converterhaving a plurality of outputs.

[0002] In resonant converters a DC voltage carried on the input side isfirst chopped and the AC voltage thus produced in the form of a choppedDC voltage is processed by means of circuit parts containing resonantcircuit elements.

[0003] Transformers, particularly ones that produce an electricalseparation of the input and output side of the converter are used forthis purpose. With converters of this type it is possible to manufactureinexpensive, small and light-weight power supply units/switched-modepower supplies, which can advantageously be used in consumer electronicsappliances such as set top boxes, satellite receivers, television sets,computer monitors, video recorders and compact audio systems. In theseapplications there is often a need for converters that generate multipleoutput voltages on multiple converter outputs from one input DC voltage.

[0004] In German patent application no. 101 22 534.2 (data of filingSep. 5, 2001) is described a resonant converter which has a plurality ofoutputs and comprises a transformer having one primary winding and atleast two secondary windings having different winding orientations. Theconverter also includes a regulating circuit for regulating theconverter output voltages.

[0005] A known concept for a converter protection circuit includes theuse of secondary side fuses which are gone when they are overloaded.Before the converter is operated again, the fuses that have blown are tobe replaced by new fuses.

[0006] It is an object of the invention to provide a circuit arrangementcomprising a regulating circuit for converters having a plurality ofoutputs, which circuit arrangement includes a protective circuit thatcan be manufactured with the least possible circuitry and expense andcalculation effort which is a reliable protection against cases ofoverload.

[0007] The object is achieved by a circuit arrangement comprising aregulating circuit which is used for generating a pulse-width modulatedregulation signal in dependence on two measuring signals present oninputs of the regulating circuit, and including a comparator circuit forcomparing the duty cycle of the regulating circuit with a predefinablemaximum and minimum duty cycle value, while in case of a duty cyclesituated outside the range between the maximum duty cycle value and theminimum duty cycle value the circuit arrangement delivers controlinformation that corresponds to this exceeding of the range.

[0008] In case of overload this circuit arrangement is in a position toreliably switch off a converter. The protective circuit can beconstructed with few cost-effective components.

[0009] The control information is delivered more particularly by simplyswitching off the regulation signal i.e. setting the regulation signalto the zero value (claim 2); other variants would be here thetransmission of the digital signal within the regulation signal or thedelivery of a control signal via a separate output of the circuitarrangement. The claims 3 to 5 characterize an overvoltage protectionwhich is a precise and reliable protection against overvoltages andco-operates with the overload protective circuit. Claim 6 makes afeedback loop possible with which even if an optocoupler fails there isstill a feedback path available for transmitting feedback signals whichcause the connected converter to be switched off.

[0010] The invention also relates to integrated circuits which includeparts of the circuit arrangement according to the invention (claims 7 to9).

[0011] Furthermore, the invention relates to a resonant converter whichincludes the circuit arrangement according to the invention and/or atleast one of the integrated circuits according to the invention (claim10).

[0012] The invention will be further described with reference toexamples of embodiment shown in the drawings, to which, however theinvention is not restricted. In the drawings:

[0013]FIG. 1 shows a resonant converter having two outputs,

[0014]FIG. 2 shows a half-bridge circuit for the resonant converter,

[0015]FIGS. 3A, 3B and 3C show various output filters for the resonantconverter,

[0016]FIG. 4 shows an equivalent circuit diagram for the resonantconverter,

[0017] FIGS. 5 to 7 show voltage and current curves in the resonantconverter,

[0018] FIGS. 8 to 10 show various options of embodiments for a resonantconverter according to the invention,

[0019]FIG. 11 shows an example of the coupling of converter outputs tothe regulating circuit of the resonant converter,

[0020]FIG. 12 shows a block diagram for a design variant of theregulating circuit of the resonant converter and

[0021]FIG. 13 shows a block diagram for a regulating circuit withovervoltage and overload protection circuits.

[0022] The circuit arrangement shown in FIG. 1 shows a resonantconverter 1 having an inverter 2 which is here designed as a chopper andconverts a DC voltage (not shown) into an AC voltage i.e. in this casechopped DC voltage Us. The inverter 2 is coupled by a capacitor to atransformer 4, which has one primary winding 5 and two secondarywindings 6 a and 6 b. The secondary windings 6 a and 6 b have differentwinding directions, so that given a positive voltage Up on the primarywinding 5 the voltage Usa generated on the secondary winding 6 a is alsopositive, whereas given a positive voltage Up, the dropping voltage Usbon the secondary winding 6 b is negative. The transformer 4 has a commontransformer core both for the primary winding 5 and for the secondarywindings 6 a and 6 b. A current flowing through the capacitor 3 in theprimary winding 5 is denoted by Ic.

[0023] The secondary winding 6 a is coupled by way of a diode Da and anoutput filter Fa to an output 7 a, on which an output voltage Ua isdropping. The secondary winding 6 b is connected by a diode Db and afilter Fb to an output 7b, on which an output voltage Ub is dropping.The converter 1 furthermore contains a feedback loop with a regulatingcircuit 8, which is coupled on the input side to the outputs 7 a and 7 bof the converter 1 and on the output side to the inverter 2. Theregulating circuit 8 sets the frequency and the duty cycle of thevoltage Us supplied by the inverter 2 as a function of the voltages Uaand Ub present on the outputs 7 a and 7 b, in order to regulate theoutput voltages Ua and Ub to desired predefined voltage values.

[0024] In the resonant converter 1, the capacitor 3, the main inductanceand the leakage inductances of the transformer 4 constitute resonantcircuit elements, which are induced to oscillate by the a-c voltage Usand produce a corresponding behavior of the current Ic flowing into thecircuit part that includes the resonant circuit elements and of thevoltage Up dropping on the primary winding. In the case of positivevoltage values of the voltage Up, a current Ia is generated, which flowsthrough the diode Da to the filter Fa for the time during which, in thisoperating state, the voltage Usa exceeds the voltage present on theinput of the filter Fa minus the diode forward voltage over the diodeDa. If the voltage Up on the primary winding 5 has positive voltagevalues, no current is generated by the secondary winding 6 b, since thediode Db blocks in this case.

[0025] In the event of negative voltage values of the voltage Up thereis a positive voltage Usb present on the secondary winding 6 b and anegative voltage Usa on the secondary winding 6 a. In this case acurrent Ib is generated, which flows from the secondary winding 6 bthrough the diode Db to the output filter Fb for the period of timeduring which, in this operating state, the voltage Usb exceeds thevoltage present on the input of the filter Fb minus the diode forwardvoltage over the diode Db.

[0026]FIG. 2 shows a design variant of the inverter or chopper 2 inFIG. 1. An actuating signal 20, here represented by a pulse sequence,generated by the regulating circuit 8, is fed to a half-bridge drivercircuit 21, which generates from the actuating signal 20 control signals22 and 23 for the switching elements 24 and 25, which form a half-bridgecircuit. The switching elements 24 and 25 are designed as MOSFETtransistors. The control signals 22 and 23 are fed to gate connections(control connections) of the transistors 24 and 25. The inverter 2converts a d-c voltage U_(DC) into the a-c voltage Us by alternatelyswitching the switching elements 24 and 25 on and off. The d-c voltageU_(DC) is generated, in power supply units/power packs/chargers, forexample, from the a-c voltage of an a-c voltage mains by means ofrectifiers.

[0027]FIGS. 3A to 3C show design variants of the output filters Fa andFb of the resonant converter 1. These have a connection A, which isconnected to the diodes Da and Db. The connections B and C are connectedto the outputs 7 a and 7 b of the converter 1. The filter according toFIG. 3 only contains a capacitor 30. The output filter according to FIG.3B includes two capacitors 31 and 32 and one inductance 33. The outputfilter according to FIG. 3C contains a capacitor 34, an inductance 35and a diode 36.

[0028]FIG. 4 shows an equivalent circuit diagram for the resonantconverter 1 in FIG. 1, in which the transformer 4 has been replaced by atransformer equivalent circuit diagram. Here the electrical function ofthe transformer 4 may essentially be represented by a primary-sideleakage inductance Lrp, a main inductance Lh, a secondary-side leakageinductance Lrsa for the secondary winding 6 a and a secondary-sideleakage inductance Lrsb for the secondary winding 6 b. The filters Faand Fb are here assumed as ideal and not shown, as is the regulatingcircuit 8. Loads Ra and Rb are connected to outputs 7 a and 7 b of theconverter 1.

[0029] FIGS. 5 to 7 show how it is possible to regulate the outputvoltages Ua and Ub by adjusting the frequency f0 and/or the cycle periodt0=1/f0 and the duty cycle of the a-c voltage Us. The duty cycle is heredetermined by the period of time tsH and tsL, the upper switchingelement 24 being switched on and the lower switching element 25 beingswitched off during a period of time tsH, and the upper switchingelement 24 being switched off and the lower switching element 25 beingswitched on during a period of time tsL. The duty cycle is obtained astsH/t0. The characteristics of the a-c voltage Us, of the current Icthrough the capacitor 3, of the current Ia through the main inductanceLa of the transformer 4, of the current Ia delivered by the secondarywinding 6 a and of the current Ib delivered by the secondary winding 6 bare represented for each of two periods of time t0. All winding ratiosin the underlying example according to the equivalent circuit in FIG. 4are assumed to be one; furthermore, Lrsa is here equal to Lrsb.

[0030]FIG. 5 shows the operating state in which the frequency f0=1/t0 isset to 1.47 times fr, fr being the resonant frequency of the converter 1and being approximately determined as${fr} = {\frac{1}{2\pi}\sqrt{\frac{1}{{C(3)}\left\lbrack {{Lrp} + {Lh}} \right\rbrack}}}$

[0031] C(3) being the capacitance of the capacitor 3. In the operatinginstance according to FIG. 5 the duty cycle is selected as 50%. In thisoperating state the current characteristics of Ia and Ib are generatedwith substantially identical half-waves during the time periods tsH andtsL respectively. In the operating state according to FIG. 6 thefrequency f0=1/t0 is increased 1.53 times fr. The duty cycle is reducedto 40%. The characteristic of the current Ia has remained substantiallyidentical to the operating state in FIG. 5. The characteristic of thecurrent Ib now has half-waves with reduced amplitude, so that the powercarried to the output 7 b by the secondary winding 6 b is reduced. FIG.7 shows an operating instance with a frequency f0=1/t0 equal to 1.55times fr and a duty cycle of 65%. In this operating instance the currentIa is essentially reduced to zero and the amplitude of the half-waves ofIb increased in comparison to FIG. 6, so that in this operating instancethe secondary winding 6 a carries no power to the output 7 a but, incomparison to FIG. 6, secondary winding 6 b carries increased power tooutput 7 b.

[0032] The examples of operating states according to FIGS. 5 to 7 showthat with the converter circuit according to the invention a highlyvariable adjustment to different loads of the various converter outputsis possible. With the converter according to the invention it ispossible, in particular, to achieve small tolerances of the outputvoltages even in the case of low output voltages and high outputcurrents.

[0033]FIGS. 8 and 9 show variants of the converter 1 in FIG. 1, whichare denoted by 1′ and 1″. In both variants the two secondary windings 6a and 6 b are electrically coupled to each other; in this instance theyare connected to a common ground potential. In the embodiment of theconverter 1 according to FIG. 1 the secondary windings 6 a and 6 b areelectrically separated from each other. In FIG. 8, moreover, as afurther variant, an additional external inductance L1 is provided, whichis arranged on the primary side of the transformer 4 between thecapacitor 3 and the primary winding 5 and acts as an additionalinductive resonant circuit element in addition to the inductance of thetransformer 4. In the given type of transformer 4 with specifictransformer inductance this additional inductance enables the resonantfrequency of the converter to be adjusted. FIG. 9 shows additionalexternal inductances L2 a and L2 b on the secondary side of thetransformer 4. The inductance L2 a is arranged between the secondarywinding 6 a and the diode Ta, the inductance L2 b is connected betweenthe secondary winding 6 b and the diode Db. These two inductances alsoact as additional circuit elements and can be used to adjust thedesired—possibly asymmetrical—power distribution between the outputs innominal operation, for instance. Converter variants are obviously alsopossible, in which additional external inductances are provided both onthe primary side of the transformer 4 and on the secondary side of thetransformer 4.

[0034]FIG. 10 shows a converter variant 1′″ with a larger number ofconverter outputs. In this instance the converter has four converteroutputs. In addition to the primary winding 5 the transformer 4 now hastwo groups of secondary windings with different winding directions(indicated by the letters a and b), which comprise the secondarywindings 6 a 1 and 6 a 2 on the one hand and the secondary windings 6 b1 and 6 b 2 on the other. The secondary windings are connected viadiodes Da1, Da2, Db1 and Db2 with output filters Fa1, Fa2, Fb1 and Fb2to the converter outputs, which carry output voltages Ua1, Ua2, Ub1 andUb2. The output voltages Ua1 and Ub1 are fed as measured variables tothe regulating circuit 8. The regulating circuit 8 therefore in thiscase evaluates two output voltages, the one output voltage Ua1 beinggenerated by the secondary winding 6 a 1 from the group of secondarywindings with the first winding direction. The other output voltage Ub1fed to the regulating circuit 8 is assigned to the secondary winding 6 b1 from the group of secondary windings having the opposite windingdirection. Here therefore, a measured variable, i.e. output voltage, isevaluated for each of the two groups having secondary windings ofdifferent winding directions and used for regulating purposes. Thisrepresents a particularly simple and effective method of regulating theoutput voltages of the converter.

[0035]FIG. 11 shows that as measured variables the regulating circuitevaluates either the actual voltages on the converter outputs or thevoltages on the connected load of the converter, the latter beingreduced compared to the corresponding output voltages, owing to voltagedrops on the leads between the converter and the loads. Examples of bothvariants are represented in FIG. 11. The converter outputs here carrythe two output voltages Ua and Ub, to each of which a load Ra and a loadRb is connected. The connecting leads between the converter outputsupplying the output voltage Ua and the load Ra are represented here bya block 31. The connecting leads between the output of the convertersupplying the output voltage Ub and the load Rb are represented by theblock 32.

[0036]FIG. 12 shows an example of embodiment of the regulating circuit8. A first measuring signal Va and a second measuring signal Vb, whichcorrespond to output voltages Ua and Ub and Ua1 and Ub1 respectively,are fed to the two inputs of the regulating circuit. The measuringsignals Va and Vb are compared with reference signals Varef and Vbref.Subtracters 100 and 101 are used here. The subtracter 100 delivers thedifference Varef−Va to a circuit block 102. The subtracter 101 deliversthe difference Vbref−Vb to a circuit block 103. The circuit blocks 102and 103 include amplifiers and scaling circuits, so that the differencesignal supplied by the subtracter 100 is multiplied by a factor KA andthe difference signal supplied by the subtracter 101 by a factor KB.Here in this example of embodiment the following relationship applies:

kA·Varef≅kB·Vbref

[0037] The output signals from the circuit blocks 102 and 103 arefurther processed by an adder 104 and a subtracter 105. The adder 104adds the output signals from the circuit blocks 102 and 103 together anddelivers its output signal to a frequency controller 106, which isdesigned, for example, as a PID controller. The difference signaldelivered by the subtracter 105 is fed to a duty cycle controller 107,which is also designed, for example, as a PID controller. A signalgenerator circuit 108 now generates the regulation signal 20 supplied tothe inverter 2 by the regulating circuit 8, the regulation signal herebeing a pulse-width modulated signal. The frequency of the signal 20,which determines the frequency of the a-c voltage Us of the resonantconverter, is set by the output signal of the frequency controller 106.The duty cycle of the signal 20, which determines the duty cycle of thea-c voltage Us, is adjusted by the duty cycle controller 107.

[0038] If the value of the measuring signal Va, for example, is reducedin the regulating circuit according to FIG. 12, so that Va becomes<Varef, this leads on the one hand to a reduction of the frequency setby the controller 106 and hence, according to the behavior of a resonantconverter, to a tendency to increase on the part of the output voltagesgenerated by the resonant converter. On the other hand, however, theerror produced in this case also causes a reduction of the duty cycle ofthe signal 20 and the a-c voltage Us determined by the controller 107.This occurs, for example, in the operating state according to FIG. 6,where the power carried to the output 7 a by the secondary winding 6 ais increased in relation to the power carried to the output 7 b by thesecondary winding 6 b.

[0039] If in another instance, for example, the measuring signal Vb orthe corresponding output voltage Ub is reduced, this likewise leads to areduction of the frequency of the signals 20 or the frequency of the a-cvoltage Us. In this case, however, the controller 107 brings about anincrease of the duty cycle of the signal 20 and the duty cycle of thea-c voltage Us, so that in this operating instance the powerdistribution is modified so that the power carried to the output 7 b isincreased in comparison to the power carried to the output 7 a. Thecontrol characteristic also applies analogously to the design variantshaving more than two converter outputs.

[0040]FIG. 13 shows a circuit arrangement comprising the components ofthe regulating circuit 8 mentioned above and is complemented by anoverload protection circuit and an overvoltage protection circuit;furthermore the half bridge driver circuit 21 forms part of this circuitarrangement.

[0041] The circuit arrangement shown in FIG. 13 is supplied with themeasuring signals Va and Vb on the input side. An adder/subtracterdevice 201 is supplied with the measuring signal Va and a referencesignal Varef. An adder/subtracter device 202 is supplied with themeasuring signal Vb and a reference signal Vbref. Furthermore, comparingdevices 203 and 204 are arranged as comparators. The comparator 203compares the measuring signal Va with a maximum value Vamax. Thecomparator 204 compares the measuring signal Vb with a maximum valueVbmax. If the measuring signal Va exceeds the maximum value Vamax or ifthe measuring signal Vb exceeds the maximum value Vbmax, it is a case ofovervoltage. For the case where the measuring signal Va exceeds themaximum value Vamax, the output voltage of the comparator 203 jumps fromits minimum value Vkmin to its maximum value Vkmax. By weighting Vkmaxwith a weight Wa, an adaptation value 205 is generated which is appliedto the adder/subtracter device 202. For the case where the measuringsignal Vb exceeds the maximum value Vbmax, the output voltage of thecomparator 204 jumps from its minimum value Vkmin to its maximum valueVkmax. By weighting Vkmax with a weight Wb, an adaptation value 206 isgenerated which is applied to the adder/subtracter device 201.

[0042] The adder/subtracter device 201 forms the difference between thereference signal Varef and the measuring signal Va and adds theadaptation value 206 to this difference. The adder/subtracter device 202forms the difference between the reference signal Vbref and themeasuring signal Vb and adds the adaptation value 205 to thisdifference. The outputs of the adder/subtracter devices 201 and 202 areconnected to a circuit block 207 which comprises the components 102,103, 104, 105, 106 and 107 of the regulating circuit 8 shown in FIG. 12i.e. the outputs of the adder/subtracter devices 201 and 202 areconnected to the inputs of the circuit blocks 102 and 103. The outputsignals 208 and 209 of the circuit block 207 i.e. the output signals ofthe controllers 106 and 107 are applied to the signal generator circuit108 via two optocouplers 210 and 211 which cause a potential isolationto the signal generator circuit 108, which signal generator circuit 108generates the regulation signal 20 and sets its frequency and duty cyclein dependence on the signals 208 and 209. The regulation signal 20 isconverted as described above into control signals 22 and 23 by the halfbridge driver circuit.

[0043] The circuit arrangement in FIG. 13 further includes a comparatorcircuit 212 which evaluates the respectively set duty cycle δ of theregulation signal 20. The duty cycle represents the power distributionover the various converter outputs of the respective converter. Thecomparator circuit 212 determines whether the duty cycle δ lies in arange between a predefinable minimum duty cycle value δmin and apredefinable maximum duty cycle value δmax. If the duty cycle δ liesoutside the range between δmin and δmax—which is the case when there isoverload (particularly a short-circuit at a converter output)—thecomparator circuit 212 causes control information to be delivered by thesignal generator circuit 108 to the half bridge driver circuit of therespective resonant converter, the control information causing thecontrol signals 22 and 23 to be switched off and thus the respectiveresonant converter to be switched off. In the present case the controlinformation is transferred because the regulation signal 20 and thecontrol signals 22 and 23 are switched off, which is the simplestsolution for the transmission of control information. After the controlinformation has been delivered, the connected converter is switched off.

[0044] In the case of overvoltage i.e. when a converter output voltageexceeds a predefined permissible maximum value, so that Va becomeshigher than Varef or Vb becomes higher than Vbref, the adding togetherof the adaptation values 205 and 206 in the adder/subtracter devices 201and 202, respectively, forces the duty cycle δ to be situated outsidethe range δmin<δ<δmax. As described above, this leads to the release ofcontrol information which here causes the connected converter to beswitched off.

[0045] Blocks 213 and 214 indicate how circuit portions of the circuitarrangement shown in FIG. 13 can be preferably combined by means of oneor a plurality of integrated circuits; block 213 and/or block 214 arethen arranged by an integrated circuit. Block 213 comprises the circuitportions referred to as 21, 108, 212, 213, δmax and δmin; block 213 issupplied on its input side with the output signals from the optocoupler210 and 211 and on the output side the control signals 22 and 23 areproduced. Block 214 comprises the circuit portions referred to as Varef,Vbref, 201, 202, 203, 204, 205, Wa and Wb. Block 214 takes up on theinput side the measuring signals Va and Vb; on the output side the block214 delivers the signals 208 and 209 to the optocouplers 210 and 211.

1. A circuit arrangement comprising a regulating circuit (8) which isused for generating a pulse-width modulated regulation signal (20) independence on two measuring signals (Va, Vb) present on inputs of theregulating circuit (20) and comprising a comparator circuit (212) forcomparing the duty cycle (δ) of the regulation signal (20) with apredefinable maximum duty cycle value (δmax) and minimum duty cyclevalue (δmin), in which in case of a duty cycle (δ) being situatedoutside the range between the maximum duty cycle value (δmax) and theminimum duty cycle value (δmin) the circuit arrangement produces controlinformation that corresponds to this exceeding of the range.
 2. Acircuit arrangement as claimed in claim 1, characterized in that thecontrol information is generated by switching off the regulation signal(20).
 3. A circuit arrangement as claimed in claim 1, characterized inthat a first comparator device (203) is provided for comparing one (Va)of the two measuring signals with a first maximum value (Vamax), anadaptation of the duty cycle (δ) caused by the generation of the controlinformation taking place when the first maximum value (Vamax) isexceeded.
 4. A circuit arrangement as claimed in claim 3, characterizedin that the second comparator device (204) is provided for comparing theother one (Vb) of the two measuring signals with a second maximum value(Vbmax), an adaptation of the duty cycle (δ) caused by the generation ofthe control information taking place when the second maximum value(Vbmax) is exceeded.
 5. A circuit arrangement as claimed in claim 4,characterized in that a first adder/subtracter device (201) is providedwhich forms a first difference (Varef−Va) between one (Va) of the twomeasuring signals and a first reference value (Varef), in that a secondadder/subtracter device (202) is provided for forming a seconddifference (Vbref−Vb) between the other one (Vb) of the two measuringsignals and a second reference value (Vbref), in that for the case wherethe first one (Va) of the two measuring signals exceeds a predefinablefirst maximum value (Vamax), the second difference (Vbref−Vb) is adaptedby the second adder/subtracter device (202) by a predefinable firstadaptation value (205), in that for the case where the second one (Vb)of the two measuring signals exceeds a predefinable second maximum value(Vbmax), the first difference (Varef−Va) is adapted by the firstadder/subtracter device (201) by a predefinable second adaptation value(206), in that the regulation signal (20) is adapted in dependence onthe output signals of the adder/subtracter devices (201, 202) whichoutput signals are determined by the first and second differences(Varef−Va, Vbref−Vb) and by the first and second adaptation values (205,206).
 6. A circuit arrangement as claimed in claim 1, characterized inthat the circuit arrangement comprises two sub-circuits (213, 214) whichare mutually coupled by two optocouplers (210, 211).
 7. An integratedcircuit (213) comprising a signal generator (108) for generating apulse-width modulated regulation signal (20) and including a comparatorcircuit (212) for comparing the duty cycle (δ) of the regulation signal(20) with a predefinable maximum duty cycle value and minimum duty cyclevalue, in which in case of a duty cycle (δ) situated outside the rangebetween the maximum duty cycle value (δmax) and the minimum duty cyclevalue (δmin) the integrated circuit (213) delivers control informationthat corresponds to this exceeding of the range.
 8. An integratedcircuit as claimed in claim 7, characterized in that the circuit (213)also includes a half bridge driver circuit (21).
 9. An integratedcircuit, characterized in that a first adder/subtracter device (201) isprovided which forms a first difference (Varef−Va) between a firstmeasuring signal (Va) and a first reference value (Varef), in that asecond adder/subtracter device (202) is provided for forming a seconddifference (Vbref−Vb) between a second measuring signal (Vb) and asecond reference value (Vbref), in that for the case where the firstmeasuring signal (Va) exceeds a predefinable first maximum value(Vamax), the second difference (Vbref−Vb) is adapted by the secondadder/subtracter device (202) by a predefinable first adaptation value(205), in that for the case where the second measuring signal (Vb)exceeds a predefinable second maximum value (Vbmax), the firstdifference (Varef−Va) is adapted by the first adder/subtracter device(201) by a predefinable second adaptation value (206).
 10. A resonantconverter comprising a circuit arrangement as claimed in claim 1 and/orincluding an integrated circuit as claimed in claim 8 and/or includingan integrated circuit as claimed in claim 10.